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Project DescriptionThis parser has been developed for those who wants to develop his/her own tool around verilog netlist. Some possible tools could be like (a) Hierarchical net, port, pin, instance extraction/modification (b) Modify a given netlist as per requirement and then dump it back (c) Create Tcl command for tools e.g PrimeTime, PrimePower etc which takes netlist as input and (d) Some automation to QC netlist . This parser has been developed in Java in order to make it platform independent. There are APIs to elaborate the design along with expression evaluation capabilities. Click here to download this free netlist parser. This tool has been bundled as an executable JAR file along with a sample application which reads a netilst, elaborates it and dumps it back. Please refer to the document for the details of the available APIs. Feel free to contact the support team for any assistance.