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Project Description

Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory, combinational logic, FSM state/arc and assertion coverage report metrics viewable via GUI or ASCII format.

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mac Mac covered-0.7.10.tar.gz (Date: 2010-12-02, Size: 3.0 MB)
linux Linux covered-0.7.10.tar.gz (Date: 2010-12-02, Size: 3.0 MB)
bsd BSD covered-0.7.10.tar.gz (Date: 2010-12-02, Size: 3.0 MB)
solaris Solaris covered-0.7.10.tar.gz (Date: 2010-12-02, Size: 3.0 MB)
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